If you go back and look at the early days of the semiconductor revolution, you see that there were many ideas for how to build gate sets out of n-type and p-type transistors. One set of ideas was known as NMOS technology and other set of ideas was known as CMOS technology. In almost every modern computer chip CMOS technology currently reigns supreme. One of the main reasons for this has to do with the power dissipation properties of these technologies. CMOS circuits dissipate a lot less energy than NMOS circuits. Basically one may think that CMOS circuits dissipate energy only when the circuit voltages are being switched wheras NMOS circuits are often running in a situation where they are dissipating energy even in between the switching of the voltages. As you can guess, this makes quite a bit of difference in the power consumption details of these devices.
So what is the equivalent technological detail for a quantum computer? Here the concept of the transistors used to build a circuit is modified to the concept of a fault-tolerant quantum gate. So if we look at fault-tolerant gate constructions and consider their energetics, are there technologies that minimize energy dissipation?